Features
- 2 full-duplex or half-duplex channels
- 10Base-T and 100Base-TX physical layer
- MAC layer realized in FPGA
- Local or external data buffer
- 6 additional GPIOs
- Fully integrated to comply with IEEE802.3
- 500 VAC isolation voltage
- -40 to +85°C with qualified components
- 32-bit/33-MHz PMC
- PMC based on USM concept
- Individual FPGA configuration