P599 - FPGA-based USM Main PMC

USM Universal Submodules make PMC modules more flexible than ever. The main PMC P599 gets its specific function through the IP cores implemented inside its onboard FPGA. This function can be changed at any time through implementation of different IP cores. The corresponding line drivers are realized on the USM which is simply plugged on the P599.

The same USM may also be used on XMCs, conduction-cooled PMCs or M-Module main modules. A new design is then limited to the USM module and the FPGA content andtherefore saves development time and costs. A Nios soft processor implemented in the Cyclone II FPGA by Altera provides local intelligence where needed. The I/O signals are led to the USM and then to a SCSI connector at the front of the P599.

The growing range of Wishbone-based standard IP cores from MEN comprise different UARTs, Ethernet, fieldbus interfaces, graphics, digital I/O etc. For users who like to write and/or implement specific IP cores on their own a complete FPGA USM development kit is available.

The USM concept has been developed for harsh environments. Therefore, the P599 uses robust connectors to the USM, while all other components are soldered, and operates in a -40 to +85 °C temperature range with qualified components.

The P599 is aPMC mezzanine card suitable for any PMC compliant host carrier board in any type of bus system, i.e. CPCI, VME or on any type of stand-alone SBC. Appropriate PMC carrier cards in 3U, 6U and other formats are available from MEN or other manufacturers.

Features

  • Main PMC for USM Universal Submodules
  • 1 USM slot
  • 1 FPGA 33,216 LE (for user-defined I/O and Nios soft core)
  • 32 MB DDR2 SDRAM
  • 2 MB Flash
  • -40 °C to +85 °C

Specifications

Functionality
  • User-defined through FPGA
  • Line drivers and/or additional hardware implemented on USM Universal Submodule (not included)
Memory
  • 32MB SDRAM memory
    • Soldered
    • DDR2
    • 132MHz memory bus frequency
    • FPGA-controlled
  • 2MB non-volatile Flash
    • For FPGA data and Nios firmware
    • FPGA-controlled
FPGA
USM Slot
  • One slot for a standard USM module
  • For implementation of line drivers and/or additional hardware
Miscellaneous
  • Eight front-panel LEDs, FPGA-controlled
  • I²C interface to detect the USM module
PMC Characteristics (PCI)
  • Compliant with PCI Specification 2.2
  • 32-bit/33-MHz, 3.3V V(I/O)
  • Target
Peripheral Connections
Via front panel on a shielded 50-pin HP D-Sub SCSI 2 receptacle connector
Electrical Specifications
  • Isolation voltage:
    • Voltage depends on implementation and signal routing of USM
  • Supply voltage/power consumption:
    • +5V (-3%/+5%), FPGA idle / US0 plugged: 83mA, memory test / US0 plugged: 109mA
    • +3.3V (-5%/+5%), FPGA idle / US0 plugged: 74mA, memory test / US0 plugged: 82mA
  • MTBF: 669,963h @ 40°C according to IEC/TR 62380 (RDF 2000)
Mechanical Specifications
  • Dimensions: conforming to IEEE 1386.1
  • Weight: 65g (w/o USM module)
Environmental Specifications
  • Temperature range (operation):
    • -40..+85°C
    • Airflow: min. 10m³/h
  • Temperature range (storage): -40..+85°C
  • Relative humidity (operation): max. 95% non-condensing
  • Relative humidity (storage): max. 95% non-condensing
  • Altitude: -300m to + 3,000m
  • Shock: 15g/11ms
  • Bump: 10g/16ms
  • Vibration (sinusoidal): 2g/10..150Hz
  • Conformal coating on request
Safety
PCB manufactured with a flammability rating of 94V-0 by UL recognized manufacturers
EMC
Tested according to EN 55022 (radio disturbance), IEC 61000-4-2 (ESD) and IEC 61000-4-4 (burst)
Software Support

Downloads